Leveraging FPGAs- Architectures and APIs

We published this unclassified unlimited release paper, summarizing our experiences in offloading floating-point operations to FPGAs on systems like the Cray XD1.

Abstract

Reconfigurable computing leveraging field programmable gate arrays (FPGAs) is one of many accelerator technologies that are being investigated for application to high performance computing (HPC). Like most accelerators, FPGAs are very efficient at both dense matrix multiplication and FFT computations, but two important aspects of how to deliver that performance to applications have received too little attention. First, the standard API for important compute kernels hides parallelism from the system. Second, the issue of system architecture is virtually never addressed. This paper explores both issues and their implications for applications. We find that high bandwidth, low latency connectivity can be important, but the right API can be even more important.

Publications

• SC06 Paper Keith D. Underwood, K. Scott Hemmert, and Craig D. Ulmer, "Architectures and APIs: Assessing Requirements for Delivering FPGA Performance to Applications", SuperComputing 2006.