We published an unclassified unlimited release (UUR) technical report summarizing our LDRD work investigating how FPGAs could be leveraged as computational accelerators in HPC platforms.
Abstract
Field programmable gate arrays (FPGAs) have been used as alternative computational devices for over a decade; however, they have not been used for traditional scientific computing due to their perceived lack of floating-point performance. In recent years, there has been a surge of interest in alternatives to traditional microprocessors for high performance computing. Sandia National Labs began two projects to determine whether FPGAs would be a suitable alternative to microprocessors for high performance scientific computing and, if so, how they should be integrated into the system. We present results that indicate that FPGAs could have a significant impact on future systems. FPGAs have the potential to have order of magnitude levels of performance wins on several key algorithms; however, there are serious questions as to whether the system integration challenge can be met. Furthermore, there remain challenges in FPGA programming and system level reliability when using FPGA devices.
Publications
- LDRD Report K. Scott Hemmert, Keith D. Underwood, Craig D. Ulmer, and David C. Thompson, "FPGAs in High Performance Computing: Results from Two LDRD Projects", Sandia Technical Report SAND2006-6888.
We published an unclassified unlimited release (UUR) paper.
Publications
- ERSA Paper Craig Ulmer and Adrian Javelo, "Floating-Point Unit Reuse in an FPGA Implementation of a Ray-Triangle Intersection Algorithm", Engineering of Reconfigurable Systems and Algorithms, June 2006.
Presentations
2005-09-29 Thu
fpga net pub bestof
We had a paper reviewed for unclassified unlimited release (UUR) that covered a TCP/IP Offload Engine and OpenGL primitive serializer that I built in FPGA hardware.
Publications
Even though I didn't find a place to publish the paper, I did get it reviewed and approved for external release. Here's a copy of where I was at with it in 2005.
- VizNic Draft Craig Ulmer and David Thompson, "A Network Interface for Enabling Visualization with FPGAs", draft
2005-05-16 Mon
fpga pub hpc
We published an unclassified unlimited release (UUR) paper about our work with the Cray XD1.
Publications
- CUG Paper Craig Ulmer, Ryan Hilles, and David Thompson, "Reconfigurable Computing Aspects of the Cray XD1", Cray User Group (CUG) 2005.
Presentations
2005-02-01 Tue
fpga pub net security bestof
We published unclassified unlimited release (UUR) papers about implementing a GigE NIDS in an FPGA.
Publications
- IJE Paper Chris Clark, Craig Ulmer, and David Schimmel, "An FPGA-based Network Intrusion Detection System with On-Chip Network Interfaces", International Journal of Electronics, Vol. 93, Issue 6, 2006. link
- ARC Paper Chris Clark and Craig Ulmer, "Network Intrusion Detection Systems on FPGAs with On-Chip Network Interfaces", Applied Reconfigurable Computing, February 2005.
Presentations
- ARC Slides Presentation given at the Applied Reconfigurable Computing Conference.